/* rcsid[]="$Header: as.h,v 820.1 86/12/04 20:00:45 root Exp $" */
/* sccsid[]="@(#)as.h	1.1 (Valid) Release 7.25 11/20/84" */
/****************************************************************************

                          Copyright  1982

               VALID  LOGIC  SYSTEMS  INCORPORATED

This listing contains confidential proprietary information which is not to
be disclosed to unauthorized persons without written consent of an officer
of Valid Logic Systems Incorporated.

The copyright notice appearing above is included to provide statutory
protection in the event of unauthorized or unintentional public disclosure.

*****************************************************************************/

| Pre-Assembly Code

| The remainder of this file consists of statements that are 
| interpreted before every 68000 program.
| This file is read by the assembler during initilization.

| Define Register Names

.defrs	d0, 0., d1, 1., d2, 2., d3, 3.
.defrs  d4, 4., d5, 5., d6, 6., d7, 7.
.defrs	a0, 8., a1, 9., a2, 10., a3, 11.
.defrs	a4, 12., a5, 13., a6, 14., a7, 15.
.defrs	sp, 15., pc, 16., cc, 17., sr, 18., usp, 19.

| Set Input and Output Radices

.radix	in, decimal
.radix	out, hex

| Define registers for movem
| D3 means just d3, D3+A2 means d3 and a2, A2-D3 means a1,a0,d7,...,d4,d3

D0	=	/1
D1	=	/2
D2	=	/4
D3	=	/8
D4	=	/10
D5	=	/20
D6	=	/40
D7	=	/80
A0	=	/100
A1	=	/200
A2	=	/400
A3	=	/800
A4	=	/1000
A5	=	/2000
A6	=	/4000
A7	=	/8000
ALL	=	0
