From: lolsen@hsr.no (Lasse Olsen)
Newsgroups: comp.os.os2.advocacy,comp.os.ms-windows.advocacy,comp.unix.advocacy,comp.sys.amiga.advocacy,comp.sys.mac.advocacy,comp.sys.atari.advocacy,comp.sys.powerpc,comp.sys.amiga.hardware
Subject: New tread - "..eh... Computing afterthoughts".
Date: 21 Jan 1995 08:13:38 GMT
Organization: Stavanger College
Message-ID: <3fqfni$hnc@marton.hsr.no>

Carol (carol@alaska.net) wrote:

: Why does Power2 need 5 times the number of transisters to make
: a similar speed chip as an Alpha?

: Do not fall into the trap of thinking that a chip with a lower
: clock is better than a similar performance chip at a higher
: clock.  People think "Well, if Power2 at 72Mhz is about as fast
: as an Alpha at 275Mhz, then think of how fast Power2 will be
: at 275Mhz".  Won't happen.

: Some chips are designed to be as simple as possible, but can
: run at a very, very high clock.  They are fast.

: Other chips are deigned to be complex and do a lot in each clock,
: they are limited to a low clock.  They are also fast.

: Each company has made a bet about which is better in the end.
: Either simple, high clocks, or complex, low clocks.

	I argree. 
	I would also like to rise a "little something", hopefully to form 
	the bases of a discussion - suitable for an afterthought perhaps..
 1
	During the past dozen years or so, many a time have the 
	computer-scientists found themselves in serious boubt of the
	likelyhood of further quantum performance progress and and quietly
	moaned: "We've finally hit the wall, we can't make it much
	faster now - nomatter what". This has been the trend every couple 
	of years since the days of the 68000 design.
	CPU-performance is a sum of several fatcors : in order of
	importance ; feature size, data-bus width and silicon purity 
	or die size if you will.
	The limit of data-bus width was apparently hit several years
	ago within the mainframe community. In the next couple of years
	CPU performance will be defined mostly by feature size and silicon
	purity alone - and this "wall" is fast leaping towards us.
	We are fast reaching the absoulute density wich silicon atoms
	are able to operate before quantum effects takes over and makes
	it impossible to predict the behaviour of the electrical path 
	within current Sa cirquit-technologies (CMOS, BiCMOS etc.). 
	Yet, the biggest problem today isn't that we are not able to 
	produce even tighter Sa masks, but the enormous expense related 
	to mass-production. 
 2	
	This is somewhat what happend with the much expectant GaAs-chips 
	(a combination of gallium and arsenic in a single crystal wich
	should yield 6-8 times faster CPU's) - because of the big market 
	dominance of Sa it would've costed much more than first predicted 
	to produce GaAs-chips in large quantities. 
	Complete new technology in development, producing and manufacturing 
	prooved to be faar to costly. Even so to the extent that Cray 
	Research - the absoulute forerunner for GaAs-technology together 
	with Gigabit Logic - had to put it's Cray 3 prodject on a 
	"wait-state" and concentrate on it's next generation of silicon 
	supercomputer - the C90.
 3
	If we, however, concentrate on Sa-technology - where do we stand?
	The latest superscalar processors have all you probably
	could imagine of clever subtlety : a large on-chip, nonblocking,
	branch prediction, branch folding, critical-word-first, out-of-
	order execution, speculative prefetch, register renaming, write-
	back-caches, operand forwarding, buffered writes and multiple
	execution units.....seemingly everything. 
 4	
	So the other big problem facing the Sa-chips is clock-speed.
	Sa-chips will, however simple and pure the architecture might be, 
	not be able to work proparly much above 500MHz - an absolute physical 
	limit for Sa wich is governed by the fact that Sa-chips are not able 
	to work at tempratures much higher than 150 degrees Celcius. 
	This leads me to belive that the Power2 technology might have a 
	firmer grip on reality for future development than that of the Alpha. 
	Of course I could be wrong - as history has shown in previous battles. 
 5	
	Several developers of high end CPU's are concentrating great effort 
	on producing a GaAs-chip with effectivly would be a simple chip 
	upgrade - the goal is to offer a pin compatible upgrade to existing 
	state-of-the-art processors, much like you upgrade a '486 to a 
	Pentium - with the drawbacks this approach implies though. It is, 
	however, a much more convinient and smooth way to - lets say - 
	quadruple (maybe even more) the speed of your CPU wich again ensures 
	a big market-share right from the beginning...
 6	
	What about other technologies. In light of the recent CICS/RISC
	"struggle", it could be appropriate to mention that some time back
	a survey was made on a fundamental new approach to CPU behaviour
	(I'm sad to say I don't remeber by whom).
	This is anther major problem in the fundamental subjective way
	the CPU's of today operate - the parallelism in the instruction
	flow itself. The author then went on to argue against using 
	instructions at all - something already, in principle, pioneered 
	by sertain gfx-cards to improve QuickDraw performance by executing 
	the QD commands directly in hardware - something wich of course would
	require some sort of logic interpret system (if anyone have any info
	regarding this subject, mail me will you. I've been trying to dig
	uo this info ever since with less degree of success. I *think*
	I read it somewhere in a science-magazine about 15 months ago.)
 7
	What about the even more state-of-the-art synthezsized diamond-
	layer based thechnology in development (possibly by Inmos 
	labratories) wich should produce chips at least 20 times faster 
	than todays best silicon dies.... Anyone have relevant info on
	this too. 
	How about _very_ recent advances in BiCMOS, bi-polar or MOSFET
	research - I'd be most grateful for any contribution....
 8
	I don't think draging infant research like optical, bio/organic,
	super conductive or massive parallel neuro-network computers
	into the discussion will bear much relevance in my (next) 5-10 year
	timeframe, although it could be a comforting and creative challenge
	to "dream" a little.....
	Last but no least, I have tried (as always) to keep this article 
	in a simple fashion - I wan't "everyone" who participate - if not
	by more than reading - at least be able to understand what is said.

	And, for the first time ever, my disklamer debut. Completly home-made
	by a good friend of mine wich also is the father and inspiration-
	source (and somewhat co author) of this article - Bjornar Bolsoy.
	After several houres of wishful thinking (and a barrel	of beer), 
	I found that an article was perhaps not that of a bad idea.. 

	"Freedom and democracy? Great! - as long as you follow the rules."
						-- Bjornar Bolsoy --
	Cheers...

From: katzer@esp68.nrl.navy.mil (D. Scott Katzer)
Newsgroups: comp.os.os2.advocacy,comp.os.ms-windows.advocacy,comp.unix.advocacy,comp.sys.amiga.advocacy,comp.sys.mac.advocacy,comp.sys.atari.advocacy,comp.sys.powerpc,comp.sys.amiga.hardware,comp.arch
Subject: Re: New tread - "..eh... Computing afterthoughts".
Date: 21 Jan 1995 17:40:41 GMT
Organization: US Naval Research Laboratory, ESTD, Washington, D.C., USA
Lines: 193
Message-ID: <3frgup$n0l@ra.nrl.navy.mil>
References: <3fqfni$hnc@marton.hsr.no> <tsikesD2rK4F.H92@netcom.com>
Reply-To: katzer@estd.nrl.navy.mil (D. Scott Katzer)
NNTP-Posting-Host: esp68.nrl.navy.mil

Hi Terry, Lasse, Carol and All,

   I've got a little to add, and some minor corrections....

In <tsikesD2rK4F.H92@netcom.com>, tsikes@netcom.com (Terry Sikes) writes:
>In article <3fqfni$hnc@marton.hsr.no>, Lasse Olsen <lolsen@hsr.no> wrote:
>>Carol (carol@alaska.net) wrote:

[...]

>>	The limit of data-bus width was apparently hit several years
>>	ago within the mainframe community. In the next couple of years
>>	CPU performance will be defined mostly by feature size and silicon
>>	purity alone - and this "wall" is fast leaping towards us.
>>	We are fast reaching the absoulute density wich silicon atoms
>>	are able to operate before quantum effects takes over and makes
>>	it impossible to predict the behaviour of the electrical path 
>>	within current Sa cirquit-technologies (CMOS, BiCMOS etc.). 

   I'm not sure what you mean by "Sa" - Si?

   Silicon still has a bright future ahead of it.  A big problem with 
making silicon integrated circuits faster is the capacitance between the 
circuit elements and the silicon wafer substrate.  There are techniques to 
reduce this capacitance by putting a layer of silicon dioxide below the 
circuit elements.  (e.g. SIMOX, BESOI, etc.)  There are problems with these
techniques, but progress is being made.

   Another way of producing faster "silicon" integrated circuits is by 
using silicon-germanium alloys for the circuit elements.  IBM has done a 
lot of work with this.  Individual transistors made from this material have
been shown to be very fast - approaching the speed of gallium arsenide 
transistors.  But there are problems with SiGe as well.

   Si, SiGe, GaAs, InP, GaN, Diamond, SiC, etc. all work best in different
niches....

>>	Yet, the biggest problem today isn't that we are not able to 
>>	produce even tighter Sa masks, but the enormous expense related 
>>	to mass-production. 

   I'm not sure I agree.  Sure it is expensive to build a new fabrication 
facility for Si circuits on 8" wafers with < 0.5 micron feature sizes.  But
once the fab is running, producing circuits on that scale is *very* 
profitable.  Industry is working on ways to produce these facilities so 
that the cost isn't as large as once feared, and cooperative agreements 
between companies on the development of new technology is helping to reduce
costs further.

>> 2	
>>	This is somewhat what happend with the much expectant GaAs-chips 
>>	(a combination of gallium and arsenic in a single crystal wich
>>	should yield 6-8 times faster CPU's)

   It's not that simple.  A comparison of the Electron Mobility between 
GaAs and Si gives the 6-8 times figure.  But the mobility advantage of GaAs
only applies at regions in transistors where the electrons are under the 
influence of low electric fields.  This is of course important, but 
doesn't tell the whole story.  At high electric fields, electrons in Si and
GaAs move at comparable speeds.  One of the biggest advantage GaAs has
over Si is that a practical "semi-insulating" substrate exists for 
reasonable costs.  This greatly reduces the capacitive coupling to the 
substrate (discussed above) and makes fast circuits possible.

   This is a complicated subject and has been argued about for years.  An 
old joke in the IC industry is, "GaAs is the material of the future - 
always has and always will be!"  :-)


>>       - because of the big market
>>	dominance of Sa it would've costed much more than first predicted 
>>	to produce GaAs-chips in large quantities. 

   Actually GaAs chips are much *cheaper* than they would have been if the 
GaAs IC industry hadn't been able to take advantage of the processing 
equipment, device computer models, etc., developed for the Si IC industry. 
There are many reasons why GaAs ICs are expensive:

   1.  Ga and As are more expensive than Si.
   2.  Production of GaAs crystals is more expensive than Si crystals.
   3.  GaAs is more fragile than Si, so wafers have to be thicker - meaning
       fewer wafers per crystal.
   4.  GaAs is softer than Si, so the wafers are more difficult to polish.
   5.  GaAs is toxic, so there are some safety issues involved in working 
       with it.
   6.  Si wafers will be available in 12" diameters in a few years, while 
       GaAs wafers are just starting to reach 6" diameters.  Since the 
       incremental processing cost for a 12" wafer is just a little more
       than a 6" wafer, it's obvious that devices made from a 12" wafer 
       will be *much* cheaper than those from a 6" wafer.

You get the idea....

>>	Complete new technology in development, producing and manufacturing 
>>	prooved to be faar to costly. Even so to the extent that Cray 
>>	Research - the absoulute forerunner for GaAs-technology together 
>>	with Gigabit Logic - had to put it's Cray 3 prodject on a 
>>	"wait-state" and concentrate on it's next generation of silicon 
>>	supercomputer - the C90.

   The Cray 3 was/(is?) built by Cray Computer Corp. which was spun off 
from Cray Research.  Part of GigaBit ended up with Cray Computer Corp, and 
part of it merged with a couple of other GaAs IC companies and ended up 
combined with TriQuint.  GigaBit was one of *many* of the early players 
in GaAs ICs.  As I recall, a Cray 3 was sold to one of the US National 
Labs. but wasn't delivered on time, so that Lab rejected it.  Corrections 
on my recollection are welcomed....

[...]

>> 4	
>>	So the other big problem facing the Sa-chips is clock-speed.
>>	Sa-chips will, however simple and pure the architecture might be, 
>>	not be able to work proparly much above 500MHz - an absolute physical 
>>	limit for Sa wich is governed by the fact that Sa-chips are not able 
>>	to work at tempratures much higher than 150 degrees Celcius. 

   So?  There are often ways around limitations like this if you're 
creative and pound on the problem long enough.  I recall that 10 years or
more ago someone published a paper in which they had a Si circuit running 
at (I believe) 500 C.  How?  Well, they machined a fine array of ridges in 
the back of the Si wafer and used a liquid cooling technique to suck the 
heat away from the circuit.  Crays and many mainframes have used liquid 
cooling for years.  Yes, heat dissipation is a big problem, but it can be
solved.

   I recall that about 10 years ago the conventional wisdom was that 
optical lithography couldn't go below 1 micron feature sizes, that silicon 
transistors couldn't work above 1 GHz, and that you couldn't get light from
silicon.  All of these hard-and-fast rules from conventional wisdom have 
proved to be wrong, or at least not as simple as once thought.  If the 
market demands microprocessors which run at 1 GHz, then someone will find a
way to provide them.  As an aside, I believe an article in the IEEE 
Spectrum magazine on the Alpha AXP microprocessor mentioned that the 
architecture was designed to eventually use 1 GHz clocks....

>>	This leads me to belive that the Power2 technology might have a 
>>	firmer grip on reality for future development than that of the Alpha. 
>>	Of course I could be wrong - as history has shown in previous battles. 

   I agree that Power2 is neat.  But, very few things are as easy to
predict as one might hope! :-)

>> 5	
>>	Several developers of high end CPU's are concentrating great effort 
>>	on producing a GaAs-chip with effectivly would be a simple chip 
>>	upgrade - the goal is to offer a pin compatible upgrade to existing 
>>	state-of-the-art processors, much like you upgrade a '486 to a 
>>	Pentium - with the drawbacks this approach implies though. It is, 
>>	however, a much more convinient and smooth way to - lets say - 
>>	quadruple (maybe even more) the speed of your CPU wich again ensures 
>>	a big market-share right from the beginning...

   That's a very tough market.  I wish them luck.

[...]

>> 7
>>	What about the even more state-of-the-art synthezsized diamond-
>>	layer based thechnology in development (possibly by Inmos 
>>	labratories) wich should produce chips at least 20 times faster 
>>	than todays best silicon dies.... Anyone have relevant info on
>>	this too. 

   Diamond is still a very immature technology.  Diamond has lots of nice 
properties, but too little is known about how to make circuits with it to
make it a viable market except where *nothing* else will work for the near
future - IMHO.  SiC has similar problems.  Recently a lot of progress has
been made in GaN technology and it has a lot of promise.  But you won't see
GaN microprocessors any time soon!

   It'll take a *lot* of work, time, and money for anything to replace Si
in the CPU market - and even then it may never happen.

>>	How about _very_ recent advances in BiCMOS, bi-polar or MOSFET
>>	research - I'd be most grateful for any contribution....

   Check out the IEEE journals like Transactions on Electron Devices and 
the Journal of Solid-State Circuits.

[...]

   Just my humble opinions....

Cheers,
Scott.
------
D. Scott Katzer             | I know a cat named Easter
NRL - Code 6856             | He says, "Will you ever learn?
Washington, D.C. 20375-5347 | You're just an empty cage girl
----------------------------| if you kill the bird." 
  My opinions, not NRL's.   |                    - Tori Amos


From ankh.iia.org!babbage.ece.uc.edu!news.kei.com!news.mathworks.com!udel!gatech!howland.reston.ans.net!vixen.cso.uiuc.edu!uxa.cso.uiuc.edu!jmg7981 Sun Jan 22 13:52:35 1995
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From: jmg7981@uxa.cso.uiuc.edu ()
Newsgroups: comp.os.os2.advocacy,comp.os.ms-windows.advocacy,comp.unix.advocacy,comp.sys.amiga.advocacy,comp.sys.mac.advocacy,comp.sys.atari.advocacy,comp.sys.powerpc,comp.sys.amiga.hardware
Subject: Re: New tread - "..eh... Computing afterthoughts".
Date: 21 Jan 1995 21:16:44 GMT
Organization: University of Illinois at Urbana
Lines: 9
Message-ID: <3frtjs$lmk@vixen.cso.uiuc.edu>
References: <3fqfni$hnc@marton.hsr.no>
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Xref: ankh.iia.org comp.os.os2.advocacy:48845 comp.os.ms-windows.advocacy:34677 comp.unix.advocacy:2836 comp.sys.amiga.advocacy:35613 comp.sys.mac.advocacy:25832 comp.sys.atari.advocacy:5327 comp.sys.powerpc:30751 comp.sys.amiga.hardware:27145

Nice article. SCIENTIFIC AMERICAN  February 1995  Volume 272  Number 2  Pages 90-95

also contains an interesting article "Trends In Semiconductor Manufacturing"
which readers may find interesting. Talks about the limits of
photo-lithography, war between photo-lithography and x-ray lithography,
limits of these techniques, etc. Very interesting - check it out -
available on America Online too.

Jaideep

