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## DRC Report File - processor.bde

Created on Thu 2016-06-02 at 01:22:05

Checking file 'C:\My_Designs\Processor\Processor\src\processor.bde'.
Inout terminal(s) and source(s) connected to net 'U_BUS(15:0)'.
Inout terminal(s) and load(s) connected to net 'T(0:1)'.
Inout terminal(s) and load(s) connected to net 'U_BUS(15:0)'.
Net 'IR_OUT(0:8)' is without load.
processor.bde - 0 error(s), 4 warning(s)
DRC process completed in 1 second(s).
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