i<>.\src\ADDER.vhd
i<>.\src\ADDSUB.vhd
i<>.\src\CONTROL.vhd
i<>.\src\COUNTER.vhd
i<>.\src\DECODER_3_8.vhd
i<>.\src\DEMONSTRATION.vhd
i<>.\src\IR.vhd
i<>.\src\MUX10TO1.vhd
i<>.\src\PROCESSOR.vhd
i<>.\src\REGISTER_9.vhd
i<>.\src\REGISTER_16.vhd
i<>.\src\SUB.vhd
i<>.\src\SUBTRACTOR.vhd
i<>.\src\T_FF.vhd
i<>.\src\TEST_CONTROL.vhd
i<>.\src\TEST_COUNTER.vhd
i<>.\src\TEST_PROCESSOR.vhd
i<>.\src\TESTMUX.vhd
i<>.\src\adder.bde
i<>.\src\addsub.bde
i<>.\src\control.bde
i<>.\src\counter.bde
i<>.\src\decoder_3_8.bde
i<>.\src\demonstration.bde
i<>.\src\ir.bde
i<>.\src\mux10to1.bde
i<>.\src\processor.bde
i<>.\src\register_16.bde
i<>.\src\register_9.bde
i<>.\src\subtractor.bde
i<>.\src\sub.bde
i<>.\src\testmux.bde
i<>.\src\test_control.bde
i<>.\src\test_counter.bde
i<>.\src\test_processor.bde
i<>.\src\t_ff.bde
