# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017  Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Intel Program License 
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other 
# applicable license agreement, including, without limitation, 
# that your use is for the sole purpose of programming logic 
# devices manufactured by Intel and sold by Intel or its 
# authorized distributors.  Please refer to the applicable 
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition
# Date created = 09:24:49  June 02, 2020
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		max10_02_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus Prime software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "MAX 10"
set_global_assignment -name DEVICE 10M02DCV36C8G
set_global_assignment -name TOP_LEVEL_ENTITY top_M02_mini
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.0.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "09:24:49  JUNE 02, 2020"
set_global_assignment -name LAST_QUARTUS_VERSION "20.1.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name ENABLE_OCT_DONE OFF
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
#set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall

set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF

set_location_assignment PIN_B6 -to IO[10]
set_location_assignment PIN_C5 -to IO[11]
set_location_assignment PIN_C6 -to IO[8]
#set_location_assignment PIN_C4      -to VCC      
set_location_assignment PIN_D6 -to IO[9]
set_location_assignment PIN_D5 -to IO[6]
set_location_assignment PIN_E6 -to IO[7]
set_location_assignment PIN_E5 -to IO[4]
#set_location_assignment PIN_F6      -to GND      
#set_location_assignment PIN_F5      -to VCCINT   
set_location_assignment PIN_F4 -to IO[2]
set_location_assignment PIN_E4 -to IO[5]
#set_location_assignment PIN_D4      -to VCC      
set_location_assignment PIN_F3 -to IO[3]
set_location_assignment PIN_E3 -to IO[1]
set_location_assignment PIN_F2 -to IO[0]
#set_location_assignment PIN_F1      -to GND      
#set_location_assignment PIN_D2      -to TDO      
#set_location_assignment PIN_D3      -to TCK      
#set_location_assignment PIN_C1      -to TDI      
#set_location_assignment PIN_B1      -to VCCINT   
set_location_assignment PIN_B2 -to LED[0]
#set_location_assignment PIN_A1      -to VCCA     
set_location_assignment PIN_A2 -to LED[1]
#set_location_assignment PIN_B3      -to GND      
set_location_assignment PIN_A3 -to LED[2]
#set_location_assignment PIN_C3      -to TMS      
set_location_assignment PIN_A4 -to KEY1
set_location_assignment PIN_E2 -to KEY0
set_location_assignment PIN_B4 -to LED[3]
set_location_assignment PIN_A5 -to IO[12]
set_location_assignment PIN_B5 -to IO[13]
#set_location_assignment PIN_A6      -to VCCA 


set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_location_assignment PIN_E1 -to SERIAL_RX
set_location_assignment PIN_D1 -to CLK100MHZ
set_location_assignment PIN_C2 -to SERIAL_TX

set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON
set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %"
set_global_assignment -name DEVICE_FILTER_PACKAGE EQFP
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS INPUT TRI-STATED"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name IO_STANDARD "2.5 V SCHMITT TRIGGER" -to KEY0
set_instance_assignment -name IO_STANDARD "2.5 V SCHMITT TRIGGER" -to KEY1
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to KEY0
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to KEY1
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name QIP_FILE mypll.qip
set_global_assignment -name VERILOG_FILE serial.v
set_global_assignment -name VERILOG_FILE top_M02_mini.v