-- megafunction wizard: %ALTCLKCTRL%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: altclkctrl 

-- ============================================================
-- File Name: c_lock.tdf
-- Megafunction Name(s):
-- 			altclkctrl
--
-- Simulation Library Files(s):
-- 			cycloneii
-- ============================================================
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 8.0 Build 215 05/29/2008 SJ Web Edition
-- ************************************************************


--Copyright (C) 1991-2008 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions 
--and other software and tools, and its AMPP partner logic 
--functions, and any output files from any of the foregoing 
--(including device programming or simulation files), and any 
--associated documentation or information are expressly subject 
--to the terms and conditions of the Altera Program License 
--Subscription Agreement, Altera MegaCore Function License 
--Agreement, or other applicable license agreement, including, 
--without limitation, that your use is for the sole purpose of 
--programming logic devices manufactured by Altera and sold by 
--Altera or its authorized distributors.  Please refer to the 
--applicable agreement for further details.

-- Clearbox generated function header
FUNCTION c_lock_altclkctrl_lei (clkselect[1..0], ena, inclk[3..0])
RETURNS ( outclk);




SUBDESIGN c_lock
(
	ena	 : INPUT = VCC;
	inclk	 : INPUT;
	outclk	 : OUTPUT;
)

VARIABLE

	c_lock_altclkctrl_lei_component : c_lock_altclkctrl_lei;

BEGIN

	outclk = c_lock_altclkctrl_lei_component.outclk;
	c_lock_altclkctrl_lei_component.ena = ena;
	c_lock_altclkctrl_lei_component.inclk[0..0] = inclk;
	c_lock_altclkctrl_lei_component.inclk[3..1] = GND;
	c_lock_altclkctrl_lei_component.clkselect[1..0] = GND;
END;



-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
-- Retrieval info: PRIVATE: clock_inputs NUMERIC "1"
-- Retrieval info: CONSTANT: ENA_REGISTER_MODE STRING "falling edge"
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone II"
-- Retrieval info: CONSTANT: USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION STRING "OFF"
-- Retrieval info: CONSTANT: clock_type STRING "Global Clock"
-- Retrieval info: USED_PORT: ena 0 0 0 0 INPUT VCC "ena"
-- Retrieval info: USED_PORT: inclk 0 0 0 0 INPUT NODEFVAL "inclk"
-- Retrieval info: USED_PORT: outclk 0 0 0 0 OUTPUT NODEFVAL "outclk"
-- Retrieval info: CONNECT: @ena 0 0 0 0 ena 0 0 0 0
-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk 0 0 0 0
-- Retrieval info: CONNECT: @clkselect 0 0 2 0 GND 0 0 2 0
-- Retrieval info: CONNECT: outclk 0 0 0 0 @outclk 0 0 0 0
-- Retrieval info: CONNECT: @inclk 0 0 3 1 GND 0 0 3 0
-- Retrieval info: GEN_FILE: TYPE_NORMAL c_lock.tdf TRUE FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL c_lock.inc TRUE FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL c_lock.cmp FALSE FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL c_lock.bsf FALSE FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL c_lock_inst.tdf TRUE FALSE
-- Retrieval info: LIB_FILE: cycloneii
