toplevel Project Status (05/04/2019 - 18:33:35)
Project File: | new_Atari2600.xise | Parser Errors: | No Errors
Module Name: | toplevel | Implementation State: | Programming File Generated
Target Device: | xc6slx16-2csg324 |

- Errors:

No Errors
Product Version: | ISE 14.7 |

- Warnings:

570 Warnings (0 new)
Design Goal: | Balanced |

- Routing Results:

All Signals Completely Routed
Design Strategy: | Xilinx Default (unlocked) |

- Timing Constraints:

X 3 Failing Constraints
Environment: | System Settings |

- Final Timing Score:

2419028 (Timing Report)

Device Utilization Summary | [-]
Slice Logic Utilization | Used | Available | Utilization | Note(s)
Number of Slice Registers | 2,096 | 18,224 | 11% |
Number used as Flip Flops | 2,078 |  |  |
Number used as Latches | 1 |  |  |
Number used as Latch-thrus | 0 |  |  |
Number used as AND/OR logics | 17 |  |  |
Number of Slice LUTs | 4,179 | 9,112 | 45% |
Number used as logic | 4,059 | 9,112 | 44% |
Number using O6 output only | 3,141 |  |  |
Number using O5 output only | 212 |  |  |
Number using O5 and O6 | 706 |  |  |
Number used as ROM | 0 |  |  |
Number used as Memory | 76 | 2,176 | 3% |
Number used as Dual Port RAM | 24 |  |  |
Number using O6 output only | 4 |  |  |
Number using O5 output only | 0 |  |  |
Number using O5 and O6 | 20 |  |  |
Number used as Single Port RAM | 16 |  |  |
Number using O6 output only | 16 |  |  |
Number using O5 output only | 0 |  |  |
Number using O5 and O6 | 0 |  |  |
Number used as Shift Register | 36 |  |  |
Number using O6 output only | 17 |  |  |
Number using O5 output only | 0 |  |  |
Number using O5 and O6 | 19 |  |  |
Number used exclusively as route-thrus | 44 |  |  |
Number with same-slice register load | 19 |  |  |
Number with same-slice carry load | 25 |  |  |
Number with other load | 0 |  |  |
Number of occupied Slices | 1,421 | 2,278 | 62% |
Number of MUXCYs used | 1,020 | 4,556 | 22% |
Number of LUT Flip Flop pairs used | 4,478 |  |  |
Number with an unused Flip Flop | 2,532 | 4,478 | 56% |
Number with an unused LUT | 299 | 4,478 | 6% |
Number of fully used LUT-FF pairs | 1,647 | 4,478 | 36% |
Number of unique control sets | 163 |  |  |
Number of slice register sites lost to control set restrictions | 566 | 18,224 | 3% |
Number of bonded IOBs | 117 | 232 | 50% |
Number of LOCed IOBs | 117 | 117 | 100% |
IOB Flip Flops | 4 |  |  |
IOB Master Pads | 4 |  |  |
IOB Slave Pads | 4 |  |  |
Number of RAMB16BWERs | 29 | 32 | 90% |
Number of RAMB8BWERs | 1 | 64 | 1% |
Number of BUFIO2/BUFIO2_2CLKs | 2 | 32 | 6% |
Number used as BUFIO2s | 2 |  |  |
Number used as BUFIO2_2CLKs | 0 |  |  |
Number of BUFIO2FB/BUFIO2FB_2CLKs | 2 | 32 | 6% |
Number used as BUFIO2FBs | 2 |  |  |
Number used as BUFIO2FB_2CLKs | 0 |  |  |
Number of BUFG/BUFGMUXs | 8 | 16 | 50% |
Number used as BUFGs | 8 |  |  |
Number used as BUFGMUX | 0 |  |  |
Number of DCM/DCM_CLKGENs | 1 | 4 | 25% |
Number used as DCMs | 1 |  |  |
Number used as DCM_CLKGENs | 0 |  |  |
Number of ILOGIC2/ISERDES2s | 0 | 248 | 0% |
Number of IODELAY2/IODRP2/IODRP2_MCBs | 0 | 248 | 0% |
Number of OLOGIC2/OSERDES2s | 4 | 248 | 1% |
Number used as OLOGIC2s | 4 |  |  |
Number used as OSERDES2s | 0 |  |  |
Number of BSCANs | 0 | 4 | 0% |
Number of BUFHs | 0 | 128 | 0% |
Number of BUFPLLs | 0 | 8 | 0% |
Number of BUFPLL_MCBs | 0 | 4 | 0% |
Number of DSP48A1s | 5 | 32 | 15% |
Number of ICAPs | 0 | 1 | 0% |
Number of MCBs | 0 | 2 | 0% |
Number of PCILOGICSEs | 0 | 2 | 0% |
Number of PLL_ADVs | 1 | 2 | 50% |
Number of PMVs | 0 | 1 | 0% |
Number of STARTUPs | 0 | 1 | 0% |
Number of SUSPEND_SYNCs | 0 | 1 | 0% |
Average Fanout of Non-Clock Nets | 4.31 |  |  |

Performance Summary | [-]
Final Timing Score: | 2419028 (Setup: 2419028, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report
Timing Constraints: | X 3 Failing Constraints |  |

Detailed Reports | [-]
Report Name | Status | Generated | Errors | Warnings | Infos
Synthesis Report | Current | Fri Aug 2 19:03:24 2019 | 0 | 520 Warnings (0 new) | 148 Infos (0 new)
Translation Report | Current | Fri Aug 2 19:03:38 2019 | 0 | 1 Warning (0 new) | 5 Infos (0 new)
Map Report | Current | Fri Aug 2 19:05:37 2019 | 0 | 12 Warnings (0 new) | 10 Infos (0 new)
Place and Route Report | Current | Fri Aug 2 19:08:43 2019 | 0 | 26 Warnings (0 new) | 0
Power Report |  |  |  |  |
Post-PAR Static Timing Report | Current | Fri Aug 2 19:09:04 2019 | 0 | 0 | 3 Infos (0 new)
Bitgen Report | Current | Fri Aug 2 19:09:36 2019 | 0 | 11 Warnings (0 new) | 2 Infos (0 new)

Secondary Reports | [-]
Report Name | Status | Generated
WebTalk Log File | Current | Fri Aug 2 19:09:38 2019

Date Generated: 08/06/2019 - 18:26:21