MONOTONIC(9)

NAME
monotonic - performance counter access system

DESCRIPTION
monotonic allows kernel and user space clients to configure and read hardware performance counters. The hardware counters can be virtualized to count per-thread and per-process. monotonic is split into three major layers:

-   The machine-dependent implementations manipulate hardware registers to configure and access the counters. This layer provides a machine-independent interface that can be used by the next layer.

-   A set of hooks and kernel routines manage the counters and provide higher-level abstractions, like 64-bit counters and counting only events that occurred on a thread or in a process.

-   A user space interface that is presented as device nodes under /dev/monotonic. See monotonic(4). Mach thread and task ports are used for the per-thread and per-process counts, with special inspection routines. Some counter values are also reflected into getrusage(), for use after a process has exited. See getrusage(2).

SEE ALSO
count(1), mperf(1), easyperf(1), getrusage(2), monotonic(4), perf(1)

HISTORY
monotonic replaces the kernel performance counter system, kpc. For the time being, monotonic backs portions of the existing kpc sysctl() interface. Prior to kpc, the AppleProfileFamily kernel extensions provided performance counter interfaces. The kernel extensions themselves expanded upon functionality provided for PowerPC by CHUD.

SECURITY CONSIDERATIONS

-   Hardware performance counters are an ideal tool for side-channel attacks. By observing how the counters are affected by an otherwise opaque process, an attacker can obtain sensitive data or key material.

    For this reason, the hardware performance counters cannot be queried directly from user space. Instead, all processes, including those owned by root, can only query the thread and process counters if they have the corresponding Mach thread or task port.

-   When used in sampling mode, hardware performance counters can induce interrupt storms that translate to denial-of-service attacks on a system. Even a careless user can stumble over this issue, since reasonable periods for some events are far too aggressive for others.

    If a hardware performance counter takes too many interrupts in a short amount of time, it will be disabled.