/*
 * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands.
 * See the copyright notice in the ACK home directory, in the file "Copyright".
 */
#define RCSID3 "$Id$"

/*
 * NS 16032 keywords
 */

/* Registers */
{0,	REG,		0,		"r0"},
{0,	REG,		1,		"r1"},
{0,	REG,		2,		"r2"},
{0,	REG,		3,		"r3"},
{0,	REG,		4,		"r4"},
{0,	REG,		5,		"r5"},
{0,	REG,		6,		"r6"},
{0,	REG,		7,		"r7"},
{0,	FREG,		0,		"f0"},
{0,	FREG,		1,		"f1"},
{0,	FREG,		2,		"f2"},
{0,	FREG,		3,		"f3"},
{0,	FREG,		4,		"f4"},
{0,	FREG,		5,		"f5"},
{0,	FREG,		6,		"f6"},
{0,	FREG,		7,		"f7"},
/* CPU dedicated registers */
{0,	AREG,		0x0,		"us"},
{0,	AREG,		0x8,		"fp"},
{0,	AREG,		0x9,		"sp"},
{0,	AREG,		0xA,		"sb"},
{0,	AREG,		0xD,		"psr"},
{0,	AREG,		0xE,		"intbase"},
{0,	AREG,		0xF,		"mod"},
/* Tokens dedicated to addressing modes */
{0,	TOS,		0x17,		"tos"},
{0,	EXTERNAL,	0x16,		"external"},
{0,	PC,		0,		"pc"},
{0,	INDICATOR,	'b',		"b"},
{0,	INDICATOR,	'c',		"c"},
{0,	INDICATOR,	'd',		"d"},
{0,	INDICATOR,	'f',		"f"},
{0,	INDICATOR,	'i',		"i"},
{0,	INDICATOR,	'm',		"m"},
{0,	INDICATOR,	'q',		"q"},
{0,	INDICATOR,	'u',		"u"},
{0,	INDICATOR,	'w',		"w"},
/* Memory management registers */
{0,	MREG,		0x0,		"bpr0"},
{0,	MREG,		0x1,		"bpr1"},
{0,	MREG,		0x4,		"pf0"},
{0,	MREG,		0x5,		"pf1"},
{0,	MREG,		0x8,		"sc"},
{0,	MREG,		0xA,		"msr"},
{0,	MREG,		0xB,		"bcnt"},
{0,	MREG,		0xC,		"ptb0"},
{0,	MREG,		0xD,		"ptb1"},
{0,	MREG,		0xF,		"eia"},
/* Instruction types */
/* Integer instructions */
{0,	ADD_I,	mk_op2(0x5,I_BYTE,I_BYTE),	"movb"},
{0,	ADD_I,	mk_op2(0x5,I_WORD,I_WORD),	"movw"},
{0,	ADD_I,	mk_op2(0x5,I_DOUBLE,I_DOUBLE),	"movd"},
{0,	ADD_I,	mk_op2(0x1,I_BYTE,I_BYTE),	"cmpb"},
{0,	ADD_I,	mk_op2(0x1,I_WORD,I_WORD),	"cmpw"},
{0,	ADD_I,	mk_op2(0x1,I_DOUBLE,I_DOUBLE),	"cmpd"},
{0,	ADD_I,	mk_op2(0x0,I_BYTE,I_BYTE),	"addb"},
{0,	ADD_I,	mk_op2(0x0,I_WORD,I_WORD),	"addw"},
{0,	ADD_I,	mk_op2(0x0,I_DOUBLE,I_DOUBLE),	"addd"},
{0,	ADD_I,	mk_op2(0x4,I_BYTE,I_BYTE),	"addcb"},
{0,	ADD_I,	mk_op2(0x4,I_WORD,I_WORD),	"addcw"},
{0,	ADD_I,	mk_op2(0x4,I_DOUBLE,I_DOUBLE),	"addcd"},
{0,	ADD_I,	mk_op2(0x8,I_BYTE,I_BYTE),	"subb"},
{0,	ADD_I,	mk_op2(0x8,I_WORD,I_WORD),	"subw"},
{0,	ADD_I,	mk_op2(0x8,I_DOUBLE,I_DOUBLE),	"subd"},
{0,	ADD_I,	mk_op2(0xC,I_BYTE,I_BYTE),	"subcb"},
{0,	ADD_I,	mk_op2(0xC,I_WORD,I_WORD),	"subcw"},
{0,	ADD_I,	mk_op2(0xC,I_DOUBLE,I_DOUBLE),	"subcd"},
{0,	COM,	mk_op2(0x8,I_BYTE,I_BYTE),	"negb"},
{0,	COM,	mk_op2(0x8,I_WORD,I_WORD),	"negw"},
{0,	COM,	mk_op2(0x8,I_DOUBLE,I_DOUBLE),	"negd"},
{0,	COM,	mk_op2(0xC,I_BYTE,I_BYTE),	"absb"},
{0,	COM,	mk_op2(0xC,I_WORD,I_WORD),	"absw"},
{0,	COM,	mk_op2(0xC,I_DOUBLE,I_DOUBLE),	"absd"},
{0,	MUL_I,	mk_op2(0x8,I_BYTE,I_BYTE),	"mulb"},
{0,	MUL_I,	mk_op2(0x8,I_WORD,I_WORD),	"mulw"},
{0,	MUL_I,	mk_op2(0x8,I_DOUBLE,I_DOUBLE),	"muld"},
{0,	MUL_I,	mk_op2(0xF,I_BYTE,I_BYTE),	"divb"},
{0,	MUL_I,	mk_op2(0xF,I_WORD,I_WORD),	"divw"},
{0,	MUL_I,	mk_op2(0xF,I_DOUBLE,I_DOUBLE),	"divd"},
{0,	MUL_I,	mk_op2(0xE,I_BYTE,I_BYTE),	"modb"},
{0,	MUL_I,	mk_op2(0xE,I_WORD,I_WORD),	"modw"},
{0,	MUL_I,	mk_op2(0xE,I_DOUBLE,I_DOUBLE),	"modd"},
{0,	MUL_I,	mk_op2(0xC,I_BYTE,I_BYTE),	"quob"},
{0,	MUL_I,	mk_op2(0xC,I_WORD,I_WORD),	"quow"},
{0,	MUL_I,	mk_op2(0xC,I_DOUBLE,I_DOUBLE),	"quod"},
{0,	MUL_I,	mk_op2(0xD,I_BYTE,I_BYTE),	"remb"},
{0,	MUL_I,	mk_op2(0xD,I_WORD,I_WORD),	"remw"},
{0,	MUL_I,	mk_op2(0xD,I_DOUBLE,I_DOUBLE),	"remd"},
{0,	ADD_I,	mk_op2(0xA,I_BYTE,I_BYTE),	"andb"},
{0,	ADD_I,	mk_op2(0xA,I_WORD,I_WORD),	"andw"},
{0,	ADD_I,	mk_op2(0xA,I_DOUBLE,I_DOUBLE),	"andd"},
{0,	ADD_I,	mk_op2(0x6,I_BYTE,I_BYTE),	"orb"},
{0,	ADD_I,	mk_op2(0x6,I_WORD,I_WORD),	"orw"},
{0,	ADD_I,	mk_op2(0x6,I_DOUBLE,I_DOUBLE),	"ord"},
{0,	ADD_I,	mk_op2(0x2,I_BYTE,I_BYTE),	"bicb"},
{0,	ADD_I,	mk_op2(0x2,I_WORD,I_WORD),	"bicw"},
{0,	ADD_I,	mk_op2(0x2,I_DOUBLE,I_DOUBLE),	"bicd"},
{0,	ADD_I,	mk_op2(0xE,I_BYTE,I_BYTE),	"xorb"},
{0,	ADD_I,	mk_op2(0xE,I_WORD,I_WORD),	"xorw"},
{0,	ADD_I,	mk_op2(0xE,I_DOUBLE,I_DOUBLE),	"xord"},
{0,	COM,	mk_op2(0xD,I_BYTE,I_BYTE),	"comb"},
{0,	COM,	mk_op2(0xD,I_WORD,I_WORD),	"comw"},
{0,	COM,	mk_op2(0xD,I_DOUBLE,I_DOUBLE),	"comd"},
{0,	COM,	mk_op2(0x1,I_BYTE,I_BYTE),	"ashb"},
{0,	COM,	mk_op2(0x1,I_BYTE,I_WORD),	"ashw"},
{0,	COM,	mk_op2(0x1,I_BYTE,I_DOUBLE),	"ashd"},
{0,	COM,	mk_op2(0x5,I_BYTE,I_BYTE),	"lshb"},
{0,	COM,	mk_op2(0x5,I_BYTE,I_WORD),	"lshw"},
{0,	COM,	mk_op2(0x5,I_BYTE,I_DOUBLE),	"lshd"},
{0,	COM,	mk_op2(0x0,I_BYTE,I_BYTE),	"rotb"},
{0,	COM,	mk_op2(0x0,I_BYTE,I_WORD),	"rotw"},
{0,	COM,	mk_op2(0x0,I_BYTE,I_DOUBLE),	"rotd"},
{0,	MOVID,	mk_op2(0x4,I_BYTE,I_WORD),	"movxbw"},
{0,	MOVID,	mk_op2(0x7,I_BYTE,I_DOUBLE),	"movxbd"},
{0,	MOVID,	mk_op2(0x7,I_WORD,I_DOUBLE),	"movxwd"},
{0,	MOVID,	mk_op2(0x5,I_BYTE,I_WORD),	"movzbw"},
{0,	MOVID,	mk_op2(0x6,I_BYTE,I_DOUBLE),	"movzbd"},
{0,	MOVID,	mk_op2(0x6,I_WORD,I_DOUBLE),	"movzwd"},
#ifdef UNUSED
{0,	MOVID,	mk_op2(0x7,I_DOUBLE,I_DOUBLE),	"movxdd"},
{0,	MOVID,	mk_op2(0x6,I_DOUBLE,I_DOUBLE),	"movzdd"},
#endif
{0,	ADD_I,	mk_op2(0x9,I_DOUBLE,I_DOUBLE),	"addr"},
/* Quick integer instructions */
{0,	MOVQ,	mk_op1(0x5,I_BYTE),	"movqb"},
{0,	MOVQ,	mk_op1(0x5,I_WORD),	"movqw"},
{0,	MOVQ,	mk_op1(0x5,I_DOUBLE),	"movqd"},
{0,	MOVQ,	mk_op1(0x1,I_BYTE),	"cmpqb"},
{0,	MOVQ,	mk_op1(0x1,I_WORD),	"cmpqw"},
{0,	MOVQ,	mk_op1(0x1,I_DOUBLE),	"cmpqd"},
{0,	MOVQ,	mk_op1(0x0,I_BYTE),	"addqb"},
{0,	MOVQ,	mk_op1(0x0,I_WORD),	"addqw"},
{0,	MOVQ,	mk_op1(0x0,I_DOUBLE),	"addqd"},
/* Extended integer instructions */
{0,	MUL_I,	mk_op2(0x9,I_BYTE,I_BYTE),	"meib"},
{0,	MUL_I,	mk_op2(0x9,I_WORD,I_WORD),	"meiw"},
{0,	MUL_I,	mk_op2(0x9,I_DOUBLE,I_DOUBLE),	"meid"},
{0,	MUL_I,	mk_op2(0xB,I_BYTE,I_BYTE),	"deib"},
{0,	MUL_I,	mk_op2(0xB,I_WORD,I_WORD),	"deiw"},
{0,	MUL_I,	mk_op2(0xB,I_DOUBLE,I_DOUBLE),	"deid"},
/* Boolean instructions */
{0,	COM,	mk_op2(0x9,I_BYTE,I_BYTE),	"notb"},
{0,	COM,	mk_op2(0x9,I_WORD,I_WORD),	"notw"},
{0,	COM,	mk_op2(0x9,I_DOUBLE,I_DOUBLE),	"notd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_EQ),	"seqb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_EQ),	"seqw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_EQ),	"seqd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_NE),	"sneb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_NE),	"snew"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_NE),	"sned"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_CS),	"scsb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_CS),	"scsw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_CS),	"scsd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_CC),	"sccb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_CC),	"sccw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_CC),	"sccd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_HI),	"shib"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_HI),	"shiw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_HI),	"shid"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_LS),	"slsb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_LS),	"slsw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_LS),	"slsd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_GT),	"sgtb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_GT),	"sgtw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_GT),	"sgtd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_LE),	"sleb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_LE),	"slew"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_LE),	"sled"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_FS),	"sfsb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_FS),	"sfsw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_FS),	"sfsd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_FC),	"sfcb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_FC),	"sfcw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_FC),	"sfcd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_LO),	"slob"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_LO),	"slow"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_LO),	"slod"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_HS),	"shsb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_HS),	"shsw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_HS),	"shsd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_LT),	"sltb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_LT),	"sltw"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_LT),	"sltd"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_GE),	"sgeb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_GE),	"sgew"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_GE),	"sged"},
#ifdef UNUSED
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_TRUE),	"strueb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_TRUE),	"struew"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_TRUE),	"strued"},
{0,	SEQ,	mk_op1c(0x3,I_BYTE,B_FALSE),	"sfalseb"},
{0,	SEQ,	mk_op1c(0x3,I_WORD,B_FALSE),	"sfalsew"},
{0,	SEQ,	mk_op1c(0x3,I_DOUBLE,B_FALSE),	"sfalsed"},
#endif
/* Bit instructions */
{0,	ADD_I,	mk_op2(0xD,I_BYTE,I_BYTE),	"tbitb"},
{0,	ADD_I,	mk_op2(0xD,I_WORD,I_WORD),	"tbitw"},
{0,	ADD_I,	mk_op2(0xD,I_DOUBLE,I_DOUBLE),	"tbitd"},
{0,	COM,	mk_op2(0x6,I_BYTE,I_BYTE),	"sbitb"},
{0,	COM,	mk_op2(0x6,I_WORD,I_WORD),	"sbitw"},
{0,	COM,	mk_op2(0x6,I_DOUBLE,I_DOUBLE),	"sbitd"},
{0,	COM,	mk_op2(0x7,I_BYTE,I_BYTE),	"sbitib"},
{0,	COM,	mk_op2(0x7,I_WORD,I_WORD),	"sbitiw"},
{0,	COM,	mk_op2(0x7,I_DOUBLE,I_DOUBLE),	"sbitid"},
{0,	COM,	mk_op2(0x2,I_BYTE,I_BYTE),	"cbitb"},
{0,	COM,	mk_op2(0x2,I_WORD,I_WORD),	"cbitw"},
{0,	COM,	mk_op2(0x2,I_DOUBLE,I_DOUBLE),	"cbitd"},
{0,	COM,	mk_op2(0x3,I_BYTE,I_BYTE),	"cbitib"},
{0,	COM,	mk_op2(0x3,I_WORD,I_WORD),	"cbitiw"},
{0,	COM,	mk_op2(0x3,I_DOUBLE,I_DOUBLE),	"cbitid"},
{0,	COM,	mk_op2(0xE,I_BYTE,I_BYTE),	"ibitb"},
{0,	COM,	mk_op2(0xE,I_WORD,I_WORD),	"ibitw"},
{0,	COM,	mk_op2(0xE,I_DOUBLE,I_DOUBLE),	"ibitd"},
{0,	CHECK,	mk_op1(0x1,I_DOUBLE),		"cvtp"},
{0,	FFS,	mk_op2c(0x5,I_BYTE,I_BYTE,0),	"ffsb"},
{0,	FFS,	mk_op2c(0x5,I_WORD,I_BYTE,0),	"ffsw"},
{0,	FFS,	mk_op2c(0x5,I_DOUBLE,I_BYTE,0),	"ffsd"},
/* Field instructions */
{0,	INS,	mk_op2(0x0,I_BYTE,I_BYTE),	"extb"},
{0,	INS,	mk_op2(0x0,I_WORD,I_WORD),	"extw"},
{0,	INS,	mk_op2(0x0,I_DOUBLE,I_DOUBLE),	"extd"},
{0,	INSS,	mk_op2(0x3,I_BYTE,I_BYTE),	"extsb"},
{0,	INSS,	mk_op2(0x3,I_WORD,I_WORD),	"extsw"},
{0,	INSS,	mk_op2(0x3,I_DOUBLE,I_DOUBLE),	"extsd"},
{0,	INS,	mk_op2(0x2,I_BYTE,I_BYTE),	"insb"},
{0,	INS,	mk_op2(0x2,I_WORD,I_WORD),	"insw"},
{0,	INS,	mk_op2(0x2,I_DOUBLE,I_DOUBLE),	"insd"},
{0,	INSS,	mk_op2(0x2,I_BYTE,I_BYTE),	"inssb"},
{0,	INSS,	mk_op2(0x2,I_WORD,I_WORD),	"inssw"},
{0,	INSS,	mk_op2(0x2,I_DOUBLE,I_DOUBLE),	"inssd"},
/* String instructions */
{0,	MOVS,	mk_op1c(0x0,I_BYTE,0),		"movsb"},
{0,	MOVS,	mk_op1c(0x0,I_WORD,0),		"movsw"},
{0,	MOVS,	mk_op1c(0x0,I_DOUBLE,0),	"movsd"},
{0,	MOVS,	mk_op1c(0x0,I_BYTE,SO_TRANS),	"movst"},
{0,	MOVS,	mk_op1c(0x1,I_BYTE,0),		"cmpsb"},
{0,	MOVS,	mk_op1c(0x1,I_WORD,0),		"cmpsw"},
{0,	MOVS,	mk_op1c(0x1,I_DOUBLE,0),	"cmpsd"},
{0,	MOVS,	mk_op1c(0x1,I_BYTE,SO_TRANS),	"cmpst"},
{0,	MOVS,	mk_op1c(0x3,I_BYTE,0),		"skpsb"},
{0,	MOVS,	mk_op1c(0x3,I_WORD,0),		"skpsw"},
{0,	MOVS,	mk_op1c(0x3,I_DOUBLE,0),	"skpsd"},
{0,	MOVS,	mk_op1c(0x3,I_BYTE,SO_TRANS),	"skpst"},
/* Block instructions */
{0,	MOVM,	mk_op2(0x0,I_BYTE,I_BYTE),	"movmb"},
{0,	MOVM,	mk_op2(0x0,I_WORD,I_WORD),	"movmw"},
{0,	MOVM,	mk_op2(0x0,I_DOUBLE,I_DOUBLE),	"movmd"},
{0,	MOVM,	mk_op2(0x1,I_BYTE,I_BYTE),	"cmpmb"},
{0,	MOVM,	mk_op2(0x1,I_WORD,I_WORD),	"cmpmw"},
{0,	MOVM,	mk_op2(0x1,I_DOUBLE,I_DOUBLE),	"cmpmd"},
/* Packed decimal instructions */
{0,	COM,	mk_op2(0xF,I_BYTE,I_BYTE),	"addpb"},
{0,	COM,	mk_op2(0xF,I_WORD,I_WORD),	"addpw"},
{0,	COM,	mk_op2(0xF,I_DOUBLE,I_DOUBLE),	"addpd"},
{0,	COM,	mk_op2(0xB,I_BYTE,I_BYTE),	"subpb"},
{0,	COM,	mk_op2(0xB,I_WORD,I_WORD),	"subpw"},
{0,	COM,	mk_op2(0xB,I_DOUBLE,I_DOUBLE),	"subpd"},
/* Array instructions */
{0,	CHECK,	mk_op2(0x4,I_BYTE,I_BYTE),	"indexb"},
{0,	CHECK,	mk_op2(0x4,I_WORD,I_WORD),	"indexw"},
{0,	CHECK,	mk_op2(0x4,I_DOUBLE,I_DOUBLE),	"indexd"},
{0,	CHECK,	mk_op2(0x3,I_BYTE,I_BYTE),	"checkb"},
{0,	CHECK,	mk_op2(0x3,I_WORD,I_WORD),	"checkw"},
{0,	CHECK,	mk_op2(0x3,I_DOUBLE,I_DOUBLE),	"checkd"},
/* Processor control instructions */
{0,	JUMP,	mk_op1(0x4,I_DOUBLE),	"jump"},
{0,	BR,	mk_c(B_EQ),		"beq"},
{0,	BR,	mk_c(B_NE),		"bne"},
{0,	BR,	mk_c(B_CS),		"bcs"},
{0,	BR,	mk_c(B_CC),		"bcc"},
{0,	BR,	mk_c(B_HI),		"bhi"},
{0,	BR,	mk_c(B_LS),		"bls"},
{0,	BR,	mk_c(B_GT),		"bgt"},
{0,	BR,	mk_c(B_LE),		"ble"},
{0,	BR,	mk_c(B_FS),		"bfs"},
{0,	BR,	mk_c(B_FC),		"bfc"},
{0,	BR,	mk_c(B_LO),		"blo"},
{0,	BR,	mk_c(B_HS),		"bhs"},
{0,	BR,	mk_c(B_LT),		"blt"},
{0,	BR,	mk_c(B_GE),		"bge"},
{0,	BR,	mk_c(B_TRUE),		"br"},
#ifdef UNUSED
{0,	BR,	mk_c(B_FALSE),		"bfalse"},
#endif
{0,	ADJSP,	mk_op1(0xE,I_BYTE),	"caseb"},
{0,	ADJSP,	mk_op1(0xE,I_WORD),	"casew"},
{0,	ADJSP,	mk_op1(0xE,I_DOUBLE),	"cased"},
{0,	ACB,	mk_op1(0x4,I_BYTE),	"acbb"},
{0,	ACB,	mk_op1(0x4,I_WORD),	"acbw"},
{0,	ACB,	mk_op1(0x4,I_DOUBLE),	"acbd"},
{0,	JSR,	mk_op1(0xC,I_DOUBLE),	"jsr"},
{0,	BSR,	mk_op(0x0),		"bsr"},
{0,	RET,	mk_op(0x1),		"ret"},
{0,	RET,	mk_op(0x2),		"cxp"},
{0,	ADJSP,	mk_op1(0x0,I_DOUBLE),	"cxpd"},
{0,	RET,	mk_op(0x3),		"rxp"},
{0,	RET,	mk_op(0x4),		"rett"},
{0,	WAIT,	mk_op(0x5),		"reti"},
{0,	WAIT,	mk_op(0xC),		"dia"},
/* Processor service instructions */
{0,	ADJSP,	mk_op1(0xA,I_BYTE),	"adjspb"},
{0,	ADJSP,	mk_op1(0xA,I_WORD),	"adjspw"},
{0,	ADJSP,	mk_op1(0xA,I_DOUBLE),	"adjspd"},
{0,	ADJSP,	mk_op1(0x2,I_BYTE),	"bicpsrb"},
{0,	ADJSP,	mk_op1(0x2,I_WORD),	"bicpsrw"},
{0,	ADJSP,	mk_op1(0x6,I_BYTE),	"bispsrb"},
{0,	ADJSP,	mk_op1(0x6,I_WORD),	"bispsrw"},
#ifdef UNUSED
{0,	ADJSP,	mk_op1(0x2,I_DOUBLE),	"bicpsrd"},
{0,	ADJSP,	mk_op1(0x6,I_DOUBLE),	"bispsrd"},
#endif
{0,	SAVE,	mk_op(0x6),		"save"},
{0,	SAVE,	mk_op(0x7),		"restore"},
{0,	ENTER,	mk_op(0x8),		"enter"},
{0,	SAVE,	mk_op(0x9),		"exit"},
{0,	LPR,	mk_op1(0x6,I_BYTE),	"lprb"},
{0,	LPR,	mk_op1(0x6,I_WORD),	"lprw"},
{0,	LPR,	mk_op1(0x6,I_DOUBLE),	"lprd"},
{0,	LPR,	mk_op1(0x2,I_BYTE),	"sprb"},
{0,	LPR,	mk_op1(0x2,I_WORD),	"sprw"},
{0,	LPR,	mk_op1(0x2,I_DOUBLE),	"sprd"},
{0,	SETCFG,	mk_op1(0x2,I_DOUBLE),	"setcfg"},
{0,	WAIT,	mk_op(0xF),		"bpt"},
{0,	WAIT,	mk_op(0xD),		"flag"},
{0,	WAIT,	mk_op(0xE),		"svc"},
{0,	WAIT,	mk_op(0xA),		"nop"},
{0,	WAIT,	mk_op(0xB),		"wait"},
/* Memory management instructions */
{0,	LMR,	mk_op1(0x2,I_DOUBLE),	"lmr"},
{0,	LMR,	mk_op1(0x3,I_DOUBLE),	"smr"},
{0,	RDVAL,	mk_op1(0x0,I_DOUBLE),	"rdval"},
{0,	RDVAL,	mk_op1(0x1,I_DOUBLE),	"wrval"},
#ifdef SU_ASSEM
/* The assembler ref. man and the CPU description booklet differ
   in the encoding of these instructions
*/
{0,	FFS,	mk_op2c(0x6,I_BYTE,I_BYTE,1),	"movsub"},
{0,	FFS,	mk_op2c(0x6,I_WORD,I_WORD,1),	"movsuw"},
{0,	FFS,	mk_op2c(0x6,I_DOUBLE,I_DOUBLE,1),"movsud"},
{0,	FFS,	mk_op2c(0x6,I_BYTE,I_BYTE,3),	"movusb"},
{0,	FFS,	mk_op2c(0x6,I_WORD,I_WORD,3),	"movusw"},
{0,	FFS,	mk_op2c(0x6,I_DOUBLE,I_DOUBLE,3),"movusd"},
#else
/* assembler reference manual version */
{0,	FFS,	mk_op2c(0x7,I_BYTE,I_BYTE,0),	"movsub"},
{0,	FFS,	mk_op2c(0x7,I_WORD,I_WORD,0),	"movsuw"},
{0,	FFS,	mk_op2c(0x7,I_DOUBLE,I_DOUBLE,0),"movsud"},
{0,	FFS,	mk_op2c(0x6,I_BYTE,I_BYTE,0),	"movusb"},
{0,	FFS,	mk_op2c(0x6,I_WORD,I_WORD,0),	"movusw"},
{0,	FFS,	mk_op2c(0x6,I_DOUBLE,I_DOUBLE,0),"movusd"},
#endif
/* Floating point instructions */
{0,	ADD_F,	mk_op2(0xD,F_FLOAT,F_FLOAT),	"absf"},
{0,	ADD_F,	mk_op2(0xD,F_LONG,F_LONG),	"absl"},
{0,	ADD_F,	mk_op2(0x0,F_FLOAT,F_FLOAT),	"addf"},
{0,	ADD_F,	mk_op2(0x0,F_LONG,F_LONG),	"addl"},
{0,	ADD_F,	mk_op2(0x2,F_FLOAT,F_FLOAT),	"cmpf"},
{0,	ADD_F,	mk_op2(0x2,F_LONG,F_LONG),	"cmpl"},
{0,	ADD_F,	mk_op2(0x8,F_FLOAT,F_FLOAT),	"divf"},
{0,	ADD_F,	mk_op2(0x8,F_LONG,F_LONG),	"divl"},
{0,	ADD_F,	mk_op2(0xC,F_FLOAT,F_FLOAT),	"mulf"},
{0,	ADD_F,	mk_op2(0xC,F_LONG,F_LONG),	"mull"},
{0,	ADD_F,	mk_op2(0x4,F_FLOAT,F_FLOAT),	"subf"},
{0,	ADD_F,	mk_op2(0x4,F_LONG,F_LONG),	"subl"},
{0,	ADD_F,	mk_op2(0x5,F_FLOAT,F_FLOAT),	"negf"},
{0,	ADD_F,	mk_op2(0x5,F_LONG,F_LONG),	"negl"},
{0,	ADD_F,	mk_op2(0x1,F_FLOAT,F_FLOAT),	"movf"},
{0,	ADD_F,	mk_op2(0x1,F_LONG,F_LONG),	"movl"},
{0,	MOVIF,	mk_op2(0x0,I_BYTE,F_FLOAT),	"movbf"},
{0,	MOVIF,	mk_op2(0x0,I_WORD,F_FLOAT),	"movwf"},
{0,	MOVIF,	mk_op2(0x0,I_DOUBLE,F_FLOAT),	"movdf"},
{0,	MOVIF,	mk_op2(0x0,I_BYTE,F_LONG),	"movbl"},
{0,	MOVIF,	mk_op2(0x0,I_WORD,F_LONG),	"movwl"},
{0,	MOVIF,	mk_op2(0x0,I_DOUBLE,F_LONG),	"movdl"},
{0,	MOVFL,	mk_op2(0x3,F_FLOAT,F_LONG),	"movfl"},
{0,	MOVFL,	mk_op2(0x2,F_LONG,F_FLOAT),	"movlf"},
{0,	TRUNC,	mk_op2(0x7,F_FLOAT,I_BYTE),	"floorfb"},
{0,	TRUNC,	mk_op2(0x7,F_FLOAT,I_WORD),	"floorfw"},
{0,	TRUNC,	mk_op2(0x7,F_FLOAT,I_DOUBLE),	"floorfd"},
{0,	TRUNC,	mk_op2(0x7,F_LONG,I_BYTE),	"floorlb"},
{0,	TRUNC,	mk_op2(0x7,F_LONG,I_WORD),	"floorlw"},
{0,	TRUNC,	mk_op2(0x7,F_LONG,I_DOUBLE),	"floorld"},
{0,	TRUNC,	mk_op2(0x4,F_FLOAT,I_BYTE),	"roundfb"},
{0,	TRUNC,	mk_op2(0x4,F_FLOAT,I_WORD),	"roundfw"},
{0,	TRUNC,	mk_op2(0x4,F_FLOAT,I_DOUBLE),	"roundfd"},
{0,	TRUNC,	mk_op2(0x4,F_LONG,I_BYTE),	"roundlb"},
{0,	TRUNC,	mk_op2(0x4,F_LONG,I_WORD),	"roundlw"},
{0,	TRUNC,	mk_op2(0x4,F_LONG,I_DOUBLE),	"roundld"},
{0,	TRUNC,	mk_op2(0x5,F_FLOAT,I_BYTE),	"truncfb"},
{0,	TRUNC,	mk_op2(0x5,F_FLOAT,I_WORD),	"truncfw"},
{0,	TRUNC,	mk_op2(0x5,F_FLOAT,I_DOUBLE),	"truncfd"},
{0,	TRUNC,	mk_op2(0x5,F_LONG,I_BYTE),	"trunclb"},
{0,	TRUNC,	mk_op2(0x5,F_LONG,I_WORD),	"trunclw"},
{0,	TRUNC,	mk_op2(0x5,F_LONG,I_DOUBLE),	"truncld"},
{0,	LFSR,	mk_op(0x1),		"lfsr"},
{0,	LFSR,	mk_op(0x6),		"sfsr"},
/* Slave processor instructions */
{0,	LCR,	mk_op1(0x2,I_DOUBLE),	"lcr"}, /* Sure ? */
{0,	LCR,	mk_op1(0x3,I_DOUBLE),	"scr"}, /* Sure ? */
{0,	CATST,	mk_op1(0x0,I_DOUBLE),	"catst0"},/* Sure ? */
{0,	CATST,	mk_op1(0x1,I_DOUBLE),	"catst1"},/* Sure ? */
{0,	LCSR,	mk_op1(0x1,S_DOUBLE),	"lcsr"},  /* Sure ? */
{0,	LCSR,	mk_op1(0x6,S_DOUBLE),	"scsr"},  /* Sure ? */
{0,	CCVSI,	mk_op2(0x7,S_DOUBLE,I_BYTE),	"ccv0db"},
{0,	CCVSI,	mk_op2(0x7,S_DOUBLE,I_WORD),	"ccv0dw"},
{0,	CCVSI,	mk_op2(0x7,S_DOUBLE,I_DOUBLE),	"ccv0dd"},
{0,	CCVSI,	mk_op2(0x7,S_QUAD,I_BYTE),	"ccv0qb"},
{0,	CCVSI,	mk_op2(0x7,S_QUAD,I_WORD),	"ccv0qw"},
{0,	CCVSI,	mk_op2(0x7,S_QUAD,I_DOUBLE),	"ccv0qd"},
{0,	CCVSI,	mk_op2(0x5,S_DOUBLE,I_BYTE),	"ccv1db"},
{0,	CCVSI,	mk_op2(0x5,S_DOUBLE,I_WORD),	"ccv1dw"},
{0,	CCVSI,	mk_op2(0x5,S_DOUBLE,I_DOUBLE),	"ccv1dd"},
{0,	CCVSI,	mk_op2(0x5,S_QUAD,I_BYTE),	"ccv1qb"},
{0,	CCVSI,	mk_op2(0x5,S_QUAD,I_WORD),	"ccv1qw"},
{0,	CCVSI,	mk_op2(0x5,S_QUAD,I_DOUBLE),	"ccv1qd"},
{0,	CCVSI,	mk_op2(0x4,S_DOUBLE,I_BYTE),	"ccv2db"},
{0,	CCVSI,	mk_op2(0x4,S_DOUBLE,I_WORD),	"ccv2dw"},
{0,	CCVSI,	mk_op2(0x4,S_DOUBLE,I_DOUBLE),	"ccv2dd"},
{0,	CCVSI,	mk_op2(0x4,S_QUAD,I_BYTE),	"ccv2qb"},
{0,	CCVSI,	mk_op2(0x4,S_QUAD,I_WORD),	"ccv2qw"},
{0,	CCVSI,	mk_op2(0x4,S_QUAD,I_DOUBLE),	"ccv2qd"},
{0,	CCVIS,	mk_op2(0x0,I_BYTE,S_DOUBLE),	"ccv3bd"},
{0,	CCVIS,	mk_op2(0x0,I_WORD,S_DOUBLE),	"ccv3wd"},
{0,	CCVIS,	mk_op2(0x0,I_DOUBLE,S_DOUBLE),	"ccv3dd"},
{0,	CCVIS,	mk_op2(0x0,I_BYTE,S_QUAD),	"ccv3bq"},
{0,	CCVIS,	mk_op2(0x0,I_WORD,S_QUAD),	"ccv3wq"},
{0,	CCVIS,	mk_op2(0x0,I_DOUBLE,S_QUAD),	"ccv3dq"},
{0,	CCVSS,	mk_op2(0x3,S_DOUBLE,S_QUAD),	"ccv4dq"},
{0,	CCVSS,	mk_op2(0x2,S_QUAD,S_DOUBLE),	"ccv5qd"},
{0,	CMOV,	mk_op2(0x0,S_DOUBLE,S_DOUBLE),	"ccal0d"},
{0,	CMOV,	mk_op2(0x0,S_QUAD,S_QUAD),	"ccal0q"},
{0,	CMOV,	mk_op2(0x4,S_DOUBLE,S_DOUBLE),	"ccal1d"},
{0,	CMOV,	mk_op2(0x4,S_QUAD,S_QUAD),	"ccal1q"},
{0,	CMOV,	mk_op2(0xC,S_DOUBLE,S_DOUBLE),	"ccal2d"},
{0,	CMOV,	mk_op2(0xC,S_QUAD,S_QUAD),	"ccal2q"},
{0,	CMOV,	mk_op2(0x8,S_DOUBLE,S_DOUBLE),	"ccal3d"},
{0,	CMOV,	mk_op2(0x8,S_QUAD,S_QUAD),	"ccal3q"},
{0,	CMOV,	mk_op2(0x2,S_DOUBLE,S_DOUBLE),	"ccmpd"},
{0,	CMOV,	mk_op2(0x2,S_QUAD,S_QUAD),	"ccmpq"},
{0,	CMOV,	mk_op2(0x1,S_DOUBLE,S_DOUBLE),	"cmov0d"},
{0,	CMOV,	mk_op2(0x1,S_QUAD,S_QUAD),	"cmov0q"},
{0,	CMOV,	mk_op2(0xD,S_DOUBLE,S_DOUBLE),	"cmov1d"},
{0,	CMOV,	mk_op2(0xD,S_QUAD,S_QUAD),	"cmov1q"},
{0,	CMOV,	mk_op2(0x5,S_DOUBLE,S_DOUBLE),	"cmov2d"},
{0,	CMOV,	mk_op2(0x5,S_QUAD,S_QUAD),	"cmov2q"},
